Purpose

This document describes the VBIOS Memory tweak table entries.

Memory Tweak Table Header

FieldName Size (in bits) Description
Version

8
Memory Tweak Table Version (0x20)
Header Size

8
Size of Memory Tweak Table Header in bytes (6)
Base Entry Size

8
Size of Memory Tweak Table Base Entry in bytes (76)
Extended Entry Size

8
Size of Memory Tweak Table Extended Entry in bytes (12)
Extended Entry Count

8
Number of Memory Tweak Table Extended Entries per Memory Tweak Table Entry
Entry Count

8
Number of Memory Tweak Table Entries (combined Base Entry plus Extended Entry Count of Extended Entries)

Memory Tweak Table Entry

Each entry is made up of a single Base Entry and multiple Extended Entries. The entire size of an entry is given by ( MemoryTweakTableHeader.BaseEntrySize + MemoryTweakTableHeader.ExtendedEntrySize × MemoryTweakTableHeader.ExtendedEntryCount ).

Memory Tweak Table Base Entry

FieldName Size (in bits) Description

CONFIG0

32
Field Definitions

[7:0] = RC
[16:8] = RFC
[23:17]= RAS
[30:24]= RP
[31:31]= Reserved

CONFIG1

32
Field Definitions

[6:0] = CL
[13:7] = WL
[19:14]= RD_RCD
[25:20]= WR_RCD
[31:26]= Reserved

CONFIG2

32
Field Definitions

[3:0] = RPRE
[7:4] = WPRE
[14:8] = CDLR
[22:16] = WR
[27:24] = W2R_BUS
[31:28] = R2W_BUS

CONFIG3

32
Field Definitions

[4:0] = PDEX
[8:5] = PDEN2PDEX
[16:9] = FAW
[23:17] = AOND
[27:24] = CCDL
[31:28] = CCDS

CONFIG4

32
Field Definitions

[2:0] = REFRESH_LO
[14:3] = REFRESH
[20:15] = RRD
[26:21] = DELAY0
[31:27] = Reserved

CONFIG5

32
Field Definitions

[2:0] = ADR_MIN
[3:3] = Reserved
[10:4] = WRCRC
[11:11] = Reserved
[17:12] = OFFSET0
[19:18] = DELAY0_MSB
[23:20] = OFFSET1
[27:24] = OFFSET2
[31:28] = DELAY0

Reserved

184

Drive Strength

2
Drive strength value to program depending on memory type

SDDR2: MR1[1:1] - Output Driver Impedence Control
SDDR3: Unused
GDDR3: MR1[1:0] = Driver Strength
GDDR5: MR1[1:0] = Driver Strength

Voltage0

3

Voltage1

3

Voltage2

3

R2P

5
Minimum number of cycles from a read command to a precharge command for the same bank.

Voltage3

3

Reserved

1

Voltage4

3

Reserved

1

Voltage5

3

Reserved

5

RDCRC

4

Reserved

36

TIMING22

32

 
Field Definitions
[9:0]   = RFCSBA
[17:10] = RFCSBR
[31:18] = Reserved

Reserved

128

Memory Tweak Table Extended Entry

FieldName Size (in bits) Description

Reserved

96